Intel's Xeon 5500 Preview

Intel is all set to launch the Xeon 5500 Server series, popularly known with

the codename Nehalem. It gets the name from Nehalem river in Oregon State, in

the US. Nehalem constitutes the tock part of Intel's famous tick-tock

development model for 45 nm processors. We reviewed the desktop version of

Nehalem processors, known as Core i7, in the December 08 issue of PCQuest. The

Server version, called as Xeon 5500, shall hit the market in four versions and

nine models (as shown in the image) on 30th March 09. Let's look at some of its

features.

The Xeon 5500 series has dynamically managed cores, threads, cache, power as

well as interfaces. Hyperthreading also makes a comeback with Nehalem. This

enables simultaneous processing of two threads in each core which means you can

have eight threads running at the same time to ensure resources are utilized

efficiently. There are advances in instructions processed per cycle, which Intel

calls as "greater parallelism" and attributes it to improvement in algorithms at

processor level, namely faster handling of branch mispredictions, improved

hardware prefetch and load store scheduling. Smart cache enhancements have also

been done. A shared L3 cache which can be up to 8MB in size has been added,

along with sharing of cache across all cores. Nehalem is also the first

processor from Intel which supports Extended Page Table feature as part of its

virtualization improvements.

Quick Path Interconnect (QPI)



This is another major development in the architecture. With processors

executing instructions faster, the main issue has been that cores are not able

to receive instructions as fast as they get those executed.

Through this technique, they are able to provide high-speed connections

between processors and memory through a point to point connection. As compared

to earlier architectures where a pool of shared memory was connected to all

processors through FSBs, in QPI each processor has its own dedicated memory.

According to Intel, QuickPath Interconnect uses up to 6.4 Gigatranfers/second

links, delivering bandwidth up to 25 Gigabytes/second (GB/s) of total bandwidth.

Turbo Boost



This new feature in Nehalem allows processor cores to run at a higher

frequency which means higher performance for single threaded applications. Core

frequency will depend upon the estimated power consumption of the processor,

current usage of the processor and temperature of the processor. So, if measured

power, current and temperature are lower than default limits and OS requests for

P0 (highest performance state) then processor will automatically increase the

core frequency.

Swapnil Arora was hosted in Portland by Intel