IData centers run hundreds of servers which are powered by thousands of
processors. The capabilities offered by a server and its power consumption are
only increasing with each passing day. The more the number of processors, more
is the power consumption. With advancements in processor technologies, we see
newer fabrication processes coming up. From initial 800 nm technology to 45 nm
and now even down to 32 nm.
We see server processors with more and more cores being added to them. The
reason behind adding more number of cores, is to make a processor more power
efficient thus adding to its performance. A lot has been said about the
shrinking die and the scaling down of semiconductor devices like transistors.
But do shrinking dies and adding more transistors, really add up to performance?
The answer is yes, as you get not just more processing power but lesser heat
dissipation as well.
Intel's Nehalem processors
Codenamed as Nehalem, Intel uses the 45 nm fabrication technology design
which uses two to eight cores with up to sixteen threads with the Intel HT
technology. The Nehalem architecture also helps in reducing the latency due to
the multi-level shared cache. Some other noteworthy trends are:
- Hyper-threading technology: With the HT technology, you get one core on
the processor to act like two cores thus boosting up performance. This is
basically a performance feature which doubles the resources available to the
OS. The advantage with using the Hyper threading technology is that it
improves parallel computations. The Hyper threading technology makes a
processor act as two logical processors thus allowing the OS to schedule two
threads simultaneously. - Optimized performance with Intel's Turbo Boost: Turbo Boost feature lets a
45 nm processor to boost processing power. It gets activated whenever the OS
requests the processor to show full capabilities along with peak performance
state.
Power management in Nehalem
The power control unit or the PCU is an integrated micro controller that
helps in managing the power. The PCU helps in reducing the leakage current &
also increases the clock rate of active cores with the Turbo mode. In order to
save time, each core on a Nehalem based CPU can be programmed to run at
different clock rates. Each individual core can switch to near zero power state.
In this way a lot of energy is saved as one or more idle cores can be shut down.
AMD Opteron 8400 Key Features |
1. HyperTransport Technology assist (HT Assist): 2. AMD-P power management technologies: 3. Enhanced AMD PowerNow & dual dynamic power |
Intel Xeon Processor family
The latest offerings for servers is the Xeon 7500 series. This powerful
breed of CPU offers increased memory & I/O capacity. This 64-bit, scalable &
multi-core server includes support for 8-cores per socket, upto 24MB shared L3
cache, and supports Intel virtualization technologies, Turbo boost technology as
well as the Hyper-threading technology. It also supports features like the
Recoverable machine check architecture, where in case of recovery, the system
works in conjunction with the OS & the embedded software to solve the issue. It
is important for a server to help in improving the system uptime. It even
provides capabilities where a malfunctioning software can be corrected before
the error shuts down the machine. Some of the key features that are supported by
Xeon 7400 & 7500 are Intel QPI, Memory Hub & DDR3, along with increased RAS
capabilities.
Westmere processor family
Westmere, is the first 32nm processor designed by Intel. It is based on Nehalem
architecture and includes a 45 nm graphics chip as well. Intel's Hyper threading
technology along with Turbo Boost technology will also be supported by Westmere.
The processor features a two-die design; one die containing two 32 nm cores
along with a 45 nm die consolidating memory & graphics controller.
Advanced Encryption Standard instructions
This widely used encryption standard helps in protecting the network data,
corporate IT infrastructure & personal data as well. AES is a block cipher that
uses an encryption key. A block cipher usually works on a single block of a data
& is an encryption algorithm. An AES algorithm is nothing but a complex
mathematical description of a process & not a computer program. The Advanced
Encryption Standard Instructions featured in Westmere are designed to implement
the AES algorithms. The Advanced Encryption Standard (AES) Instructions (AES-NI)
comprise of six new instructions with the ability to perform numerous intensive
parts of the AES algorithm.
Intel Xeon Processor family
Based on the Nehalem architecture, this 32 nm technology is based on its
predecessor Intel Xeon 5500. It adds new security features like AES-NI and Intel
TXT. Its lower power CPUs are designed for better performance with intelligent
power technology. The 6 cores/12 threads per processor are optimized for price,
performance & power efficiency.
Trusted Execution technology (TXT)
Formerly codenamed LaGrande technology, the TET or the TXT is nothing but a
set of hardware extensions. It provides extensions to processors & chipsets that
helps in enhancing the security capabilities of a digital office platform. In
simple terms, it provides a hardware-based mechanism that helps in maintaining
the integrity & confidentiality of data. The data is protected against
software-based attacks on the client PC.
AMD 'Instanbul' six-core Opteron processor
Opteron is a six-core based server processor that combines the capabilities in a
single processor with clock speeds ranging upto 2.6GHz. The Opteron 2400 series
& 8000 series are based on Istanbul architecture. It has an integrated memory
controller that supports DDR, DDR2 & DDR3 SDRAM. Istanbul is a replacement for
the quad-core Shanghai and is based on 45 nm technology. Istanbul has 904
million transistors which is more than the number of transistors used in
Shanghai. With six execution cores, the benefit here is that each of the core
can issue three instructions per clock.
The six-core AMD Opteron 8400 series processor is meant to
be used for a consolidated virtualization platform.