Designing a CPU

Looking at a tape recorder from the outside, you see knobs, with which you can do a few things. In the case of a microprocessor, that ‘thing’ is the instruction set. Though the instruction set is not a machine, it is close enough. It can add A and B or multiply A by B, and so on. Based on instructions, the processor can do predictable things. Instructions are mathematical and logical, and determine the behavior of a machine (processor) to the outside world.

Then there are the performance and compatibility angles. The compatibility of processors is across different generations of processors like the 386, 486, Pentium, P4. They are backward compatible. This is ensured by keeping the basic instruction set the same. But the performance of each is different. So, when you design the processor, you know that the basic instruction set has to be adhered to, but the performance has to be

enhanced.

This is the starting point of processor design. Say, we are designing the P4. You pick up specific performance parameters. Suppose the PIII was designed three years ago with five million transistors. Today, we have to design a new processor, and can go up to 20 million transistors. We also know the performance of the existing processor. So, we will target (targets are quite high, otherwise it is not worth the effort) to achieve twice this performance.

The instruction set and performance goals have to be compatible. The instruction set cannot be sacrificed to attain the performance goals. Now, look at the areas you are going to revamp.

The instruction set is the architecture of the machine. Next comes the micro-architecture, where we take instructions and look at their current performance, and seek out ways of improving performance, to make it run in less cycle time. Another way is to look at how to improve the frequency of the processor. Thus you start defining the micro-architecture of the new processor.

You then create internal documents which are literally books in themselves. Based on these, you model the microprocessor in software. Designing a microprocessor requires extensive software expertise. You model the micro-architecture and use computers to simulate it. Some of the modeling tools are used across generations of processors, but some are freshly created for each new generation processor. When you model the humungous microprocessor, you model separate blocks and then integrate them, just like you develop software as modules and then integrate them. Even with the fastest of machines, this model could be running very slow, in hertz, as opposed to mega or giga hertz. But you can verify the behavior of the machine in every cycle.

A separate activity is to implement this micro-architecture physically, to take these blocks, and create the necessary circuitry.

The micro-architecture has registers, logical gates, and so on. When you create this circuitry, you simulate it separately for speed. These simulations will also tell you what will be the frequency at which this processor will run. Thus, the logical and timing simulations are done separately. Then you have the critical path–how long it will take between clock cycles. The slowest path of the machine is going to decide the frequency of the machine. So you have to move the slowest path faster and faster. Or if in a certain area, if between two clocks, it is taking too much time, and if the next clock does not have that much to do, then we will transfer some of the logic from one to the next. If there are two functions, of which one is tight on time, and the other has excess time, then you move some of the activities from the first to the second, to balance both. When you make changes like that, you have to go back and change the micro-architecture. You are doing logical simulation. Then you are doing timing simulation. The timing simulation will feed the logical simulation, and the logical simulation in turn will feed the timing simulation. This cycle could take as much as a year to complete. For some of the newest processors, you could have a hundred logic designers and a hundred circuit designers working together.

When the timing is verified in the circuit design, you take those circuits and implement in physical layouts. You are literally drawing circuit designs of transistors and resistors. Again, there is an iterative cycle there. From the drawing, you extract the parasetics–things like capacitance and resistance that hinder speed. When you were doing the timing simulation, you may have assumed that two transistors are close by. But in actual layout, if they are far apart, then there could be timing issues. This information is fed back to the timing simulation. This leads to changes in the circuitry, which may need changes in the logic, which are fed back to the logic model. So, now there are three levels of iterations.

The logical model makes sure that the machine behaves according to the instruction set. The timing simulation figures out how fast the machine is going to run, and the physical layout will verify whether the timing is right.

Once everything has stabilized, you create masks, basically the different layers, which is the design database that goes to the factory. To speed up physical design and the timing work, you create cells. If there is a certain function that is replicated in places, then you design it once and replicate it where needed. You don’t design to the transistor level every time. You create macros. There is always a desire to be able to do design at a higher level, and automate the rest. To a certain extent this is possible. But there is still a lot of human effort involved. went from the Pentium processorto the addition of MMX, the specific need arose from the way PCs were being used. There were a lot of graphics and multimedia com ponents in everyday PC usage. So, it was felt that if we add a few instructions, we could give something to the software industry, using which they could make these functions very fast. The machine is backward compatible because the original instruction set is still there. In the X86 family, the original instruction set is there all through, up to the Itanium. So, the newer processor will do everything that the older one did plus more.

There is an overhead because of this, but if you want to guarantee that all your software is going to run, there is no option.

You have all the instructions, but from a performance perspective, certain instructions (like loading numbers) are used more often than others. You put emphasis on speeding these up. Also, with the processors being fast and having so many transistors, it is not that much of an issue. Certain instructions are done in microcode (instructions in built-in ROM on the processor), like a piece of firmware. Especially in CISC processors; RISC processors don’t have it. This is done for instructions that are fairly complex, by breaking them into smaller instructions. Running microcode is like running a program inside the processor. The microcode can also be thought of as a sequencer. A complex function may require ten different things to be done for it to execute. But to the user, you have given the complex function as an instruction. So, inside you have to break it down into primitives and that is what the microcode does.

Another team develops the Silicon process, which defines the transistor, design rules, number of layers, etc. These will be put into process files. The physical layout of the chip has to be done obeying these rules. In fact, there are checks done for this using software called design rule checkers.

Once you have done the mask, the mask set fits into the process. This is where the minimum sizes come in, and the maximum sizes to some extent. The transistor is defined with a minimum gate length of so much and so on. You build up libraries of such elements from which the designer picks up the elements he wants to place in his design. When you are designing a microprocessor, you invent a lot of things, new algorithms to new materials, and these get patented. You would get upwards of one hundred patents in one micro processor design.

Avatar Saini, Director-South Asia, Intel Asia Electronics, holds seven patents in micro processor design